The present invention relates to integrated circuit (IC) design. In particular, it relates to implementing logic changes in a synthesized, placed, routed, and optimized circuit.
Circuit designers know that in existing logic flows even a small change in the specification can lead to large changes in the implementation. More generally, there is need for computer aided design (CAD) methodologies to allow for transformations that are incremental. Logic synthesis remained a bottleneck in incremental design.